Date Published: June 04, 2017
Publisher: John Wiley and Sons Inc.
Author(s): Wen Li, Fengning Guo, Haifeng Ling, Peng Zhang, Mingdong Yi, Laiyuan Wang, Dequn Wu, Linghai Xie, Wei Huang.
Nonvolatile organic field‐effect transistor (OFET) memory devices based on pentacene/N,N′‐ditridecylperylene‐3,4,9,10‐tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n‐type P13 embedded in p‐type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well‐like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge‐trapping property of the poly(4‐vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high‐performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory.
Pentacene, P13, PVP (weight‐average molecular weight Mw = 11 000), PMMA (weight‐average molecular weight Mw = 350 000), PS (weight‐average molecular weight Mw = 250 000), and OTS were purchased from Sigma‐Aldrich and used without further purification. All OFETs were fabricated in bottom‐gate and top‐contact configuration. For rigid devices, heavily doped n‐type Si wafer with 300 nm thick SiO2 served as gate electrode and gate insulator layer, respectively. The substrates were cleaned sequentially in an ultrasonic bath with acetone, isopropanol, and deionized water for 5 min each and dried at 100 °C for 10 min. For OHTMs based on polymer electret layer, PVP (or PS, PMMA) layer was prepared by spin‐coating from the solution of the polymer in toluene (3 mg mL−1) on the cleaned SiO2 substrates at a spin‐speed of 3000 rpm for 1 min; for OHTMs modified with SAM‐OTS, SiO2 substrates were immersed in OTS solution with toluene as solvent (2 mg mL−1) for 12 h, and then rinsed with toluene. Subsequently, the substrates were transferred in the oven to bake for 1 h at 80 °C in the air. After that, active layers (50 nm thick pentacene for the OFET based on a single pentacene layer, 10 nm thick P13, and 18 nm thick pentacene for the bilayer OFET based on bottom‐P13/top‐pentacene, 30 nm thick pentacene, and 10 nm thick P13 for the bilayer OFET based on bottom‐pentacene/top‐P13, or 30 nm thick pentacene, 10 nm thick P13 and 18 nm thick pentacene for the OHTMs) were thermally evaporated sequentially at a pressure of ≈5 × 10−4 Pa onto the substrates at a deposition rate of 1 Å s−1. The devices were completed by the formation of Au source and drain electrodes through the metal shadow mask with the channel length (L) and channel width (W) of 100 and 2000 µm, respectively. For flexible OHTMs, 70 µm thick PET sheet was used as substrate, which was cleaned sequentially with acetone, ethanol, and deionized water, and then dried at 120 °C for 20 min to improve its flexibility and thermal stability. Then, 170 nm thick Al gate electrode was thermally evaporated on the PET substrate. PMMA dielectric layer was prepared by spin‐coating from the solution of PMMA in toluene (50 mg mL−1) on the Al/PET substrate at 3000 rpm for 1 min, and followed by thermal treatment at 80 °C for 2 h. The residual device fabrication process was identical with the rigid OHTMs. The electrical characteristics of the devices were measured using an Agilent B1500A semiconductor parameter analyzer. All the measurements were carried out in the dark under ambient conditions. Film thickness was measured by Bruker Dektak XT stylus profiler. AFM characterizations were carried out with Bruker Scan Asyst.
The authors declare no conflict of interest.